Some of you may be a bit fed up already with these slew rate posts, however I find this fascinating as is taking me through different routes of experimentation.

On my last tests, I abused the DN2540 to an extent which meant the dead of it. So I ended up adding the appropriate back to back protection zeners on the gate:

The DN2540 is far from ideal as a follower though. It has a low transconductance compared to other enhancement mode MOSFETs like my favourite STP3NK60ZFP. When selecting MOSFETs for a follower stage, we want the following characteristics:

1. Low reverse capacitance (Crss) and this to be linear vs voltage in which the FET will operate in
2. Not bothered about the input capacitance (Ciss) as this is “bootstrapped” in a follower mode – more on this later.
3. High transconductance (gm) as this will increase the negative feedback, linearise the FET and minimise the impact of Ciss.

Why do we care of the high transconductance? Well, don’t be afraid, a bit of maths to follow…

How do we determine the input capacitance of the follower? Recalling the valve cathode follower formulae:

The input capacitance can be calculated from:

Where Cag and Cgk are the triode capacitances and A is the follower stage gain (A<1) which can be derived from:

Where μ is the voltage gain of the triode, ra the internal anode resistance and Rk is the cathode resistance of the follower.

Converting the above formulae for the MOSFET follower we get then:

Firstly, as the follower has higher transconductance it performs better than the valve on this function in minimising the input capacitance and linearising the stage. The challenge we have with the MOSFETs is that their values are all over the place and also the datasheets never include either rds or μ. We only have a value of gm. Either way, gm times rds gives μ which is pretty high in a MOSFET.

What about the gain of the MOSFET follower when the source resistor (Rs) is replaced by a CCS? The CCS (if it’s a simple depletion FET with a programming resistor) has a high output impedance which is:

  or    

Some key takeaways from all the formulae presented above:

1. We want the gain of the follower (A) to be as close to 1 as possible. This translates into high negative feedback and the bootstrap of Ciss leaving the input capacitance to be just Crss. In reality, depending on the transconductance of the MOSFET we get A between 0.92 to 0.98. The DN2540 is not great here as I measured 100mA/V @ Id=10mA.
2. The other factor which increases the follower gain is the impedance of the source load (Rs). If a CCS is used, then Rs=Zout is maximised and a bipolar cascoded pair is best to maximise the output impedance of the CCS.

A tale of three MOSFETs

I chose three FETs which I have at hand yesterday when performing these tests:

STP3NK60ZFP: Enhancement 600V MOSFET

1. Ciss=311pF
2. Coss=43pF
3. Crss=8pF
4. Gfs=1.8 S (or 1,800 mA/V)

DN2540: Depletion 500V MOSFET

1. Ciss=300pF
2. Coss=30pF
3. Crss=5pF
4. Gfs=0.325 S (or 325 mA/V) – actual measured gm was 100mA/V at 10mA!

IXTP08N100D2: Depletion 1000V MOSFET

1. Ciss=325pF
2. Coss=24pF
3. Crss=6.5pF
4. Gfs=0.560S (or 560 mA/V). Looking at the data sheet the gm at 10mA is as low as the DN2540!

The three MOSFETs are similar around the capacitances however they do have different transconductances. Personally, I’ve used the three of them in the audio path and I prefer the sound of the STP3NK60ZFP amongst the rest.

The three devices have low variance of Crss above 20V. From the IXTP08N100D2 graph we can see a slope of just 0.1pF/V which is not appreciable on the other graphs due to the scale.

Back to the Slew Rate Tests

I re-run the tests on the bench but this time with an external signal generator which provided  7Vrms maximum output level. The results are summarised below:

The IXTP08N100D2 performed better than the DN2540, however the STP3NK60ZFP was best at 20kHz. Looking at the harmonic profile at 1kHz:

The DN2540 seemed to add 4dB of H3 distortion but not H2. The other 2 FETs add 1.6dB of H3 and apparently provide some level of H2 distortion cancellation (2-3dB) or reduction of the generator distortion due to lower input capacitance.

Now if we look at the performance at 20kHz:

 

Due to limitations of my external USB sound card I could not measure H3 (60kHz) unfortunately, however the results above show that the DN2540 performs as well as the STP3NK60ZFP and increase H2 level by 11dB. On the other hand the IXTP08N100D2 is worse here.

Do you want to see more evidence on the slew rate limitation? Here are some shots which will paint the picture if you’re still not seeing the white elephant in the room:

So here is the previously performance of the DN2540 at 20kHz and 10mA of quiescent current:

Now if we reduce the quiescent current down to 3mA (as a 01a will do):

The distortion has whooped to 3.4%! This is what slew rate can do 🙂

Now if we crank up the current to 30mA:

 

Then the H2 level goes down to -65dB. If we use instead a STP3NK60ZFP:

The H2 level is reduced further down to -75dB. This shows that as the transconductance is much higher at higher currents (30mA instead of 10mA) many things take place. The input capacitance is reduce, the slew rate limitation is reduced and the stage feedback is maximised so further reduction in the overall distortion is achieved.

In summary the key doggy-bag take aways are:

1. Use a high-transconductance MOSFET. The enhancement ones are better here. Some also come with input protection zeners which is a bonus. Watch out for low and constant Crss as well and don’t worry about Ciss providing the gm is high!
2. Run the FET with good current. This will kill two birds with one stone. The more current:
   1. the higher the transconductance and the better the FET will perform here in terms of reduction of distortion and input capacitance.
   2. the lower slew rate the stage will have.

As a closing point, a more elegant tail CCS will be as follows:

A bipolar (Q1) and FET (M2) pair will enable you to use the same enhancement part and provide a very stable CCS solution.  Alternatively, if you want the best performance, a cascoded bipolar pair will provide the lowest output capacitance and highest impedance of the CCS.

 

Enough for today…