How many more times

Led Zeppelin wrote a fantastic song on their first album: how many more times. You may not be a rock fan, but hey: what a great song. How many more times do I want to get back to this “slew rate” theme? I don’t know, as much as I have to. Plenty of comments out there of bad designs with wimpy drivers attempting to take the 300B/2A3 or even 45 valves to full tilt with disappointing results. Either way, they always blame the valves.

I came back to revisit the driving of capacitive loads effectively as I’m working on a new 4P1L PSE amplifier. Slowly, but getting there. Previously I looked at adding a buffer to the 01a preamp as a result of slew rate limitations found in Tony’s implementation of this preamp.

 

 

The circuit design

Well, nothing new here. There are plenty of follower designs out there. From a basic MOSFET with a source resistor like the one implemented by Tony to more elaborate ones which improves the circuit by reducing the output impedance and stabilising the quiescent current of the CCS.

I played with many designs and settled with a simple one based in MOSFETs. You can argue that a pair of cascoded bipolar can improve the performance, but I love the simplicity and effectiveness of this design. The follower is based around the MOSFET M1. In my case, I used a Cree SiC MOSFET C3M0280090D as the capacitances are very low (i.e. Crss=5pF @VDS=50V), has relatively high transconductance (Gfs=3S) and performed well. You can use whichever enhancement MOSFET you like here (even the same STP3NK60ZFP used as M2 will do really well), and you should try your choice and listen. The circuit is DC coupled to the driver stage, however if you’re using this circuit to driver an output stage in DC with grid bias (see below diagram), then the output capacitor C2 is omitted (as the output of the follower is connected directly to the valve grid) and then C2 is moved to the input between the driver and buffer (as Cin):

In between the two you will add your bias voltage (Vbias via Rbias) and instead of referencing the circuit to ground it will go to the negative bias supply (VB). If you move C2 from the output to the input (Cin) then its value can be reduced significantly (the LF pole is formed by Cin and Rbias). If you bias network to the gate of M1 is high impedance (e.g. 1MΩ) then you can reduce the value of Cin to 10-20nF which its great.

You need VB to allow for enough headroom of your driving signal. however the lower, the more dissipation will take place across M2.

R2 is the classic gate stopper (as so it’s R3), but I also added ferrite beads (f1 and f2).  D1 and D2 are key to protect the maximum VGS of M1 whilst they are not needed for M2 as they are built-in on the MOSFET. M1 is arranged in source follower mode but instead of having a source resistor a CCS formed by M2 is in place as it will minimise the output impedance and maximise the performance of M1. M2 gate has negative feedback from Q1. Q1 senses the current flowing throw R4 which stabilise the current on the M2 FET. If more current flows it will increase conduction of Q1 and therefore turn off M2. I set the buffer to 10mA quiescent current on M1 by setting R4 to Vbe/Iq. Vbe is 0.7V typically  and Iq is the quiescent follower current. 10mA should be plenty unless you want to drive heavy loads.

I initially omitted C1, but my tests proved that you need a decoupling cap there. Good to filter unwanted RF noise. I had it at least in my workbench.

For an HT of 200V, both M1 and M2 are dissipating about 1-1.2W. M2 can better live with a clip heatsink and M1 since its size, can work without. If you are increasing HT then you need to look at proper heatsinks as needed.

Tests

Here is a simple test which shows the slew rate effect. Firstly, we have the output of the SiC MOSFET follower in the below FR diagram. You can see that with a heavy load like 2,200pF the response is good up to 200-210kHz for an output level of 10Vrms. This is what you would get out of the BF862-based gyrator without a demanding load, however, you will not get this FR response without the buffer (as we will see later below). The LF difference is due to the 220nF output capacitor interacting with the 1/gm output resistance of the SiC MOSFET whereas I have a 1μF output capacitor on the Gyrator Test Mule:

 

 

The second FR test shows the response of the gyrator without the output buffer. This is just a plain UX-201A valve biased with filament bias and Ia=3ma. The load is same aggressive 2,220pF//100kΩ. The HF response is impacted due to the slew rate effect and is reduced to 90kHz. Still pretty good but if you have an output stage (in particular PSE) you would expect potentially higher capacitance and of course a large output signal level. Remember, slew rate is directly proportional to the signal level.

The above THD plot shows the harmonic response of the UX-201a BF862 gyrator stage DC-coupled to the SiC follower. The output level is 10Vrms. Distortion is lower than 0.001% Any unwanted gremlins below -90dB are the noise of my workbench setup. Even the 32kH and 40kHz spikes which I suspect are my LED lightning or similar.

I ran the same tests at 10kHz and 20kHz and you can see the 2-4dB distortion difference due to slew rate.

Doggy bag

1. SiC follower performs really well. Watch out for oscillation, beads and gate stoppers are a must. Either good MOSFET with low Crss (e.g. 8pF) and high transconductance should work here as well.
2. Distortion of the SiC MOSFET follower is really low. And it sounds nice!Slew rate is minimized and maximum performance of driver is achieved with the follower.
3. However, if you  are using the gyrator for a DHT preamp, unless is paramount and the load is really demanding (e.g. >1nF) then you don’t need a buffer stage as the slew rate would be ok and FR of the preamp would be high enough.