This is the first instalment of a series of blog posts around CCS for valve circuits. Hope you enjoy it as much as I did with the experiments conducted as a result of my interest in CCS-driven circuits.
The depletion cascoded CCS
It’s been long time since I’ve done some circuit analysis and algebra, hopefully I’ve got this right. Seems to get to the expected result, so hey: I’ve done it ok.
The analysis of this circuit starts by using the T-model of the MOSFET. I’ve omitted the parasitic capacitances to simplify the analysis. I leave you the challenge to add them in though. If we look at the typical self-biased depletion FET CCS we can find the output impedance by doing the following formulae crunching:
In summary, the output impedance looking from the source side is:
Testing RIAA stages is a real challenge. However, with current testing gear becoming affordable to us thanks to the development of PCs and sound card interfaces, now you can test your RIAA stage without further excuses. There are software-based solutions to implement IRIAA transfer curve for looking at a flat frequency response of our RIAA stage, but they are not free or easy to implement unless you are skilled on data manipulation on your PC. You can also build your own analogue IRIAA stage. In fact, Morgan Jones suggests a great way of implementing this in his great “Building Valve Amplifiers” (Second Edition) which was recently released. I recommend the book highly, albeit I will not fall in the trap again of buying the e-book version. I was highly disappointed with the e-book release of 4th edition of “Valve Amplifiers”. I guess I will just use my Kindle for reading plain books instead.
The circuit proposed by Morgan Jones is inspired on Hagerman’s paper (thanks Gary B for providing the link) which includes an IRIAA stage for same purposes:
Extracted from “On Reference RIAA Networks” by Jim Hagerman
Morgan Jones changed Hagerman’s design component values to fit to the 3.18uS Neuman pole instead of 3.5uS and combined 1% and 0.1% resistor tolerances to improve the accuracy of the IRIAA response. You can get the essence of the circuit from the above diagram.
I modified the circuit proposed by Morgan Jones slightly to fit my requirements and in particular I added the additional resistors to simulate DL103’s output resistance of 40Ω.
I had a nice strong mints sweet metal box from Marks & Spencer and used it ast the housing for the IRIAA stage. A BNC adapter also was added to the input to ensure I could hang the IRIAA box from either the waveform generator or the SC interface:
Inside the IRIAA box
MC and MM outputs
IRIAA box
Input connector
Inside box 2
Inside box 3
Building this box takes just a couple of hours and you will be amazed with the results you can achieve. I wish I could post the diagram but I don’t have Morgan Jones’ permission so I hope this post encourages you to buy the book if you weren’t still convinced to do so.
This IRIAA stage has two outputs. One for MC and the other one for MM. You can see the ideal frequency response below:
In summary, the output impedance looking from the source side is:
